Monolithic CMOS RF Transceiver

Simplified transceiver block diagram: click on a block to see who's working on it.

The goal of this project is to integrate a complete monolithic radio transceiver in CMOS. The project presents many new challenges in CMOS RF design. We are targeting both the DCS 1800 (a variant of the popular GSM standard) and DECT (Digital European Cordless Telephone) standard as a demonstration of the multi-standard capability of this approach Blocks currently under design include: receiver system design, LNA,image-reject mixer (adaptive image-reject mixer, mixer design), frequency synthesizer (LC tank based PLL, delay-locked loop (DLL), divider), continuous-time anti-aliasing filter, A/D converter, up-conversion mixers, and power amplifiers(Class C Power Amplifier, Class E Power Amplifier).


Technical documents

People

  • Gray, Paul
  • Au, Danelle -- Continuous Time Anti-Aliasing Filter
  • Chien, George -- Delay-Locked Loop (DLL)
  • Gerna, Danilo -- Mixer Design
  • Khoo, Kelvin -- Sigma-Delta A/D Converter
  • Lin, Li -- LC tank based Phase Locked Loop (PLL)
  • Naryanaswami, Sekhar -- Class C Power amplifier
  • Ou, Jeff Jia-Jiunn -- LNA
  • Robinson, Troy -- Frequency Division
  • Rudell, Jacques Christophe -- System design, adaptive image reject mixer
  • Tsai, King-Chun (Martin) -- Class E Power Amplifier
  • Weldon, Jeff -- Upconversion Mixer Design
  • Related research: The infopad project
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    Last modified: Wed Jul 7 16:21:02 PDT 1999