Theses

The following are MS and PhD theses in various formats. Send inquiries directly to the author. To send for hardcopies of UCB EE theses see also:

To search the list of EECS theses for title or author, entry your query below: The AltaVista search engine is called.

A/D Conversion

M. Hajimorad, "Analysis of Jitter Propagation in Differential Clock-Drivers" (PDF) UC Berkeley MS Thesis, May 2005.
Y. Chiu, "High-Performance Pipeline A/D Converter Design in Deep-Submicro CMOS" (PDF) UC Berkeley PhD Thesis, December 2004.
A. Abo, "Design for Reliability of Low-voltage, Switched-capacitor Circuits" (PDF) UC Berkeley PhD Thesis, May 1999. Available as ERL Memo M99/25.
K. Khoo, "Programmable, High-Dynamic Range Sigma-Delta A/D Converters for Multistandard, Fully-Integrated CMOS RF Receivers" (PDF) UC Berkeley MS Thesis, January 1999.
A. Feldman, "High-Speed, Low-Power Sigma-Delta Modulators for RF Baseband Channel Applications" (PDF) UC Berkeley PhD Thesis, September 1997.
G. Chien, "High-Speed, Low-power, Low-voltage, Pipelined Analog-to-Digital Converter" (HTML/PS/MIF) UC Berkeley MS Thesis, 1996.
L. Lin, "Design Techniques for Parallel Pipelined ADC", (PS) UC Berkeley MS Thesis, May 1996.
T. Cho, "Low-Power Low-Voltage Analog-to-Digital Conversion Techniques using Pipelined Architecures" (PDF) UC Berkeley PhD Thesis, 1995.
D. Cline, "Noise, Speed, and Power Trade-Offs in Pipelined Analog to Digital Converters" (PDF) UC Berkeley PhD Thesis, November 1995.

RF Transceivers and Building Blocks

M. Tsai, "CMOS Power Amplifiers for Wireless Communications" (PDF) UC Berkeley PhD Thesis, 2007.
J. Weldon, "High-Performance CMOS Transmitters for Wirelesss Communications" (PDF) UC Berkeley PhD Thesis, 2005.
R. S. Narayanaswami, "RF CMOS Class C Power Amplifiers for Wireless Communications" (PDF) UC Berkeley PhD Thesis, December 2001.
N. Sneed, "A 2-GHz CMOS LC-Tuned VCO using Switched-Capacitors to Compensate for Bond Wire Inductance Variation" (PDF) UC Berkeley MS Thesis, December 2000.
G. Desjardins, "Adapative Digital Signal Processing Algorithms for Image-Rejection Mixer Self-Calibration" (PDF) UC Berkeley MS Thesis, December 2000.
L. Lin, " Design Techniques of High Performance Integrated Frequency Synthesizer for Multi-standard Wireless Communication Applications" (PDF) UC Berkeley PhD Thesis, November 2000.
G. Chien, "Low-Noise Local Oscillator Design Techniques using a DLL-based Frequency Multiplier for Wireless Applications" (PDF) UC Berkeley PhD Thesis, January 2000.
D. Au, "Programmable, Low Noise, High-Linearity Baseband Filter for a Fully-Integrated, Multi-standard, CMOS RF Receiver" (PDF) UC Berkeley MS Thesis, January 1999.
R. S. Narayanaswami, "The Design of a 1.9GHz 250mW CMOS Power Amplifier For DECT" (PDF) UC Berkeley MS Thesis, May 1998.
T. Weigandt, "Low-Phase-Noise, Low-Timing-Jitter Design Techniques for Delay Cell Based VCOs and Frequency Synthesizers" (PDF) UC Berkeley PhD Thesis, January 1998.
C. J. Barrett, "Low-Power Decimation Filter Design for Multi-Standard Transceiver Applications" (PDF) UC Berkeley MS Thesis, December 1997.

Analog CAD

I. Vassiliou, "Top Down Design of a Phase Locked Loop For a Video Driver System" (PS) MS thesis, UCB.

Repository of theses from the Analog CAD group

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Last modified: Tue Jun 10 18:09:41 PDT 2008