GSM / DECT / GPS Receiver Specifications

The following document is a preliminary set of specification for the second generation multi-standard receiver. These specifications should be treated as a living document subject to change, careful attention should be payed to the revision date.

A brief summary and description will be given for all of the standards under consideration for this project. Then a detailed explanation is given of the method used to calculate specifications for the overall receiver and each of the individual receiver components. These calculation methods were then applied to two receiver architectures under consideration, Wideband IF w/ Double Conversion (WIF) and Low-IF single conversion. Clear easy to follow specifications are given for each receiver component with respect to equivalent input noise, input voltage IP3, maximum required swing and dynamic range.

2.0 Summary of E-GSM /DCS 1800 / DECT / GPS Standard

A few highlights of the GSM, DECT and GPS specification as they apply to the receiver are given. The specifications are outlined with respect to noise figure, intermodulation, blocking performance, image rejection, and maximum inband signal.

2.1 Frequency Bands

Shown in figure 1 are the frequency bands of interest for this project. The channel spacings for GSM, Enhanced GSM, DCS 1800, and PCS 1900 are 200kHz wide, while DECT consist of 10 channels with a bandwidth of 1.728 MHz. The single GPS channel for the Coarse Acquisition (C/A) code is 2 MHz wide.

2.2 Sensitivity and Noise Figure Requirements

The sensitivity requirements for the three standards under consideration are shown in table1 with the corresponding input SNR (See definitions in 3.1.1), required Carrier-to-Noise Ratio (CNR) required to maintain the minimum BER outlined in the standards, along with required NF. The calculation method for all of the table1 entries are given in section4.0.

2.3 Blocking Requirements

A summary of the blocking requirements and the corresponding blocking test that must be performed to comply with DECT, GPS, and all version of GSM are given in the following section. By far, the most difficult standard with respect to blocking performance is GSM, in particular the blocker 3 MHz away from the carrier.

2.3.1 GSM

The blocking test for GSM is performed by applying a GMSK modulated desired signal 3dB above the required receiver reference sensitivity. Then a single unmodulated tone (simple sinewave) is applied to the receiver at discrete increments of 200 kHz from the desired signal with a magnitude as shown in the specific blocking requirements of GSM, E-GSM, DCS1800, PCS1900. Note, the following blocking requirements are given for the mobile station(MS) only, a separate set of specifications exist for the base station.

The blocking requirements are similar among the different GSM standards with some exceptions which are outlined below. By far, one of the most difficult specifications to meet in GSM is the 3 MHz blocker which is typically 76 dB above the carrier. Other unique features of the blocking specifications are what is referred to as "spurious response frequencies" which are a set of exceptions which relax the requirements in a selected range of frequencies. The frequency of the relaxed blocking requirements are selected by the user and each channel is allowed a different set of spurious response frequencies. For example, if we set a spurious response frequencies for channel 800 in DCS 1800 then move to channel 805 we can again assign a new set of spurious response frequencies.

The blocking test are performed over the entire spectrum for each possible desired channel.

2.3.1.1 GSM 900 (Mobile Station Receiver)

Figure 2 is the blocking profile for GSM 900. Unique features of GSM 900 over other versions of GSM are that all out-of-band blockers are at 0 dBm with exception of the spurious response frequencies.

Spurious Response Frequencies:
When a spurious response frequency is selected the blocking requirement is relaxed to -49 dBm at the frequency which the blocker is applied. A separate set of spurious response exceptions can be applied to each channel.

6 inband frequencies may be selected with a maximum of three adjacent frequencies assigned as spurious response exceptions.

24 out-of-band spurious response frequencies are allowed with a maximum of three adjacent frequencies assigned as spurious response exceptions.

2.3.1.2 E-GSM (Mobile Station Receiver)

The blocking profile for E-GSM is shown in figure 4. The blocking mask is identical to GSM 900 with the single exception of a relieved spec. on some of the out-of-band blockers on the lower side of the MS band. Specifically the blocker requirement in the 905 MHz to 915 MHz area are reduced to -5dBm.

Spurious Response exceptions:
Both the inband and out-of-band exceptions are identical to GSM 900. Again, the spurious response exceptions can be reassigned for each BTS-to-MS channel (Base Station to mobile channel).

2.3.1.3 DCS 1800 (Mobile Station Receiver)

Figure 5 is the blocking mask for DC 1800. Unique characteristics of this band are that the desired inband signal is set to -97dBm instead of -99 dBm. Another difference is that the two power levels for the out-of-band blockers and the 3 MHz blocker is at -26 dBm instead of -23 dBm making it slightly easier to meet spec with a -97 dBm desired signal.

Spurious Response Frequencies:
When a spurious response frequency is selected the blocking requirement is relaxed to -49 dBm at the frequency where the blocker is applied. As with the other GSM standards the spurious response exceptions can be reassigned.

12 inband frequencies may be selected with a maximum of three adjacent spurious response exceptions.

24 out-of-band spurious response frequencies are allowed with a maximum of three adjacent frequencies assigned to be spurious response exceptions

2.3.1.4 PCS 1900 (Mobile Station Receiver)

Figure 6 is the blocking profile for PCS 1900. The blocking requirements are very similar to DCS 1800 with the exception that the desired inband signal is at -99 dBm.

Spurious Response Frequencies:
When a spurious response frequency is selected the blocking requirement is relaxed to -43 dBm at the frequency which the blocker is applied. The spurious response exceptions can be reassigned for each channel.

12 inband frequencies may be selected as spurious response exceptions. There appear to be no limit to the number of adjacent frequencies which may be selected to have as an exception.

24 out-of-band spurious response frequencies are allowed. Again, there appear to be no exceptions to the number of adjacent bands allocated as spurious response frequencies.

2.3.2 DECT

DECT has considerably easier blocking requirements when compared to GSM. A set of test conditions are given for both inband and out-of-band blocking signals.

2.3.2.1 Inband blocking requirements:

The receiver must maintain a 10^-3 BER when a -73 dBm desired signal is applied to the receiver and a single blocker is applied to the input of the receiver. The blocker is a GMSK modulated signal of power level given in figure 7. The blocking requirements include a -83dBm Co-Channel blocker (The Co-Channel blocker is an interfering signal applied in the same band as the desired signal).

2.3.2.2 Out-of-band Blocking Requirements:

A desired -73dBm input signal is applied to the receiver in channel 4. Then a single unmodulated blocker (simple sinewave) is applied in each of the following bands with the signal strength indicated in figure 9. A 10^-3 BER must be maintained, this maps to an approximate C/I ratio of 10dB at the output of the receiver.

2.4 Intermodulation Requirements

2.4.1 GSM 900, E-GSM, DCS 1800, PCS 1900

The adjacent channel immunity test is performed by applying two unmodulated carriers with a power level of -49 dBm to the input of the receiver while a signal 3dB above the reference sensitivity is applied (-99 dBm for GSM 900, E-GSM, and PCS 1900. -97dBm for DCS 1800). The receiver must maintain a 10^-3 BER or 9dB C/I at the output of the receiver while performing the adjacent channel test. However, this also includes the effects of noise in the receiver channel. Therefore, the distortion components plus the white noise in the receiver degrade the C/I ratio. The distortion components must then be approximately 12 dB below the desired signal. With this information we can now estimate the overall receiver input IP3.

The desired signal is at -99 dBm and we want all the distortion from the receiver to remain 12 dB below the desired signal or at -111 dBm. If the two intermodulating adjacent channels are applied to the receiver at -49 dBm then we know that the IM3 component must be,

(EQ 1)

The IM3 component decrease at a rate of 20dB/decade for every decade increase in input power. Therefore, the input referred IP3 can be expressed as,

(EQ 2)

Which gives us a -18 dBm input referred IP3 or better is required of the receiver to be compliant with the GSM standard.

2.4.2 DECT

Similar to GSM, the DECT standard outlines a set of conditions to test the intermodulation performance of the receiver. A desired carrier is applied to the receiver 3dB above the reference sensitivity or -80 dBm. Two adjacent channels signals are applied with a -46 dBm input power. Using the same procedure to calculate the input referred IP3 as in GSM we get an IP3 of,

(EQ 3)

2.4.3 GPS

Not yet determined,

3.0 Proposed Architectures

3.1 Wideband IF w/ Double Conversion

3.1.1 Description

Similar to the architecture used on the DECT receiver [6] we are currently considering the Wideband IF with double conversion (WIF) architecture (see figure 10). The requirements of the individual blocks of the Wideband IF approach have been completely specified in section5.0.

The RF filter does a first order filtering of out-of-band signals. Then all of the potential inband signals are frequency translated to IF with a fixed frequency synthesizer. A simple low pass filter is used before the signal band is frequency translated using an IF channel select synthesizer. Unlike the DECT project, we are most likely going to use a low-IF frequency at the output of the second mixer for GSM and zero-IF for both DECT and GPS. The signal is then put through an anti-alias filter before passing through a high dynamic range oversampled ADC. A small image rejection calibration circuit may be used on the GSM receiver. While calibrating (possibly during start-up) an image tone will be synthesized using the local oscillators which are already present. This tone will then be injected into the input of the image rejection mixer and used to tune the quadrature phase of the LOs and possibly the gain between the signal paths.

FIGURE 10. Wideband IF w/ Double Conversion Architecture

3.1.2 Pros and Cons Wideband IF w/ Double Conversion

Pros
First synthesizer (LO1) is a fixed frequency synthesizer. Theoretically, it should have a superior phase noise performance over an integrated RF channel select synthesizer. In addition, the integrated solution for a high frequency synthesizer is easier to implement in hardware when the frequency is fixed.

Neither of the local oscillators are at the frequency of the carrier reducing the risk of LO mixing degrading the overall receivers dynamic range.

Cons
LO leakage could still be a problem with the second mixer stage (shown as mixer 2 in the schematic).

The two stage mixing make it particularly difficult to achieve a low noise figure, low distortion receiver. For GSM, it is particularly difficult to meet the 3MHz blocking specification with two sets of mixers in the receiver signal path.

The Image-rejection mixer requires highly accurate phase and gain matching between the quadrature LOs and the signal paths. However, this hopefully would be addressed with a single-sideband mixer with the capability to inject an image tone for calibration purposes.

3.2 Low-IF Single Conversion

A second approach which was suggested by Jeff Weldon (shown in figure 11), is similar to the architecture used by UCLA for their direct conversion receiver. The key idea is to use a single-side band mixer to synthesize a local oscillator using two other oscillators. The Berkeley approach to frequency synthesis using a fixed frequency RF LO and a variable IF synthesizer which performs the channel selection could still be used in this approach. Unlike, the UCLA receiver, we would frequency translate the carrier to a low IF (instead of baseband) using a single set of mixers to avoid the effects of 1/f noise and DC offsets.

FIGURE 11. Low-IF single conversion.

3.2.1 Pros and Cons of Low-IF Single Conversion.

Pros
Similar to Wideband IF, the Low-IF architecture can utilized a fixed high frequency LO leaving the channel-select function to be performed at the lower IF frequency.

There is one less mixer stage in the receiver signal path compared to WIF making the receiver blocking, noise, and intermodulation performance considerable easier to meet aggressive specification like GSM.

Cons
The local oscillator used by the one stage mixer for frequency translation is created using a single-sideband (SSB) mixer. Both the gain and phase mismatch going through the SSB LO mixer will generate an unwanted sideband at the output on the low side of LO1. This is similar to the image-rejection problem in the Wideband IF receiver.

One practical approach to addressing the unwanted sideband coming out of the image-rejection mixer is to ensure that it is far enough away in frequency from the desired sideband such that some attention in the unwanted band is provided by the RF filter. This may be accomplished by making LO2 high enough in frequency.

The output of the SSB mixer must be able to drive the capacitive load of the receivers mixers. This node will in all likelihood be a high impedance node which must run at 1.9GHz. Harmonics of both LO₁ and LO₂ may be difficult to deal with in the SSB mixer. The individual four mixers must be extremely linear and drive an output at high frequency into the mixer input. The SSB individual mixer cells will be the most challenging RF component to design in the Low-IF architecture.

Practically speaking, the voltage gain of the LNA is limited to approximately 20 dB. In addition, the lower bound of the integrated inband noise referred to the input of the baseband section is approximately 20V rms. To meet the receiver noise figure requirement of 9dB for GSM a considerable amount of gain must be provided before the baseband circuits. It was estimated that a single mixer stage would need to provided a voltage conversion gain of 18dB (see section5.3 and section6.0) to overcome the noise introduced by the baseband and meet the noise figure requirement. It is somewhat impractical to design a mixer with 18dB of conversion gain and operate at 1.9GHz.

4.0 Integrated Receiver Calculations

The following section outlines a procedure that was used to both design and estimate the overall receiver performance for both the Wideband IF architecture and the Low-IF receiver system in section5.0 and section6.0.

4.1 Noise Figure

Much literature has been written giving detailed descriptions of how to calculate the noise figure of a conventional discrete component receiver. In typical multi-component receiver, the input and output impedance of the RF blocks are typically matched to 50. However, modern receivers are becoming increasingly more integrated. In this case, it is sometimes difficult to predict the gain at a particular node and both the input and output impedances are typically not matched to 50. Therefore, some of the conventional definitions and the noise figure calculations can be confusing. The following is one way to calculate both the sensitivity and the noise figure of an integrated receiver. First, let's look some of the definitions of both noise figure and sensitivity.

4.1.1 Sensitivity

The true definition of sensitivity is the minimum detectable signal (typically specified in units of dBm) at the receiver input such that there is a sufficient signal to noise ratio at the output for a given application. From figure 12 we can see that depending on how you interpret the input signal power you can obtain two different signal levels for the sensitivity number. The confusion now arises when we match the input of the receiver to certain impedance, in the example shown below this would be when Rin = Rs, do we define the sensitivity at Vs (the source generating signal) or is the sensitivity defined by the voltage across the input terminals of the receiver?

"Industry jargon" typically refers to an open-circuit voltage as "hard" and closed circuit voltage as "soft"[1]. True radio-phils prefer the "hard" definition of sensitivity which is with an open circuit input to the receiver and a minimum detectable signal across the input terminals.

4.1.2 Receiver Noise Figure: Conventional Approach

The best way to understand the definition of receiver noise figure is to start by reading one of the original papers written on the subject by Friis in 1944 [2]. Starting as Friis does with a simple example of a source loaded with a 4 terminal device and an output circuit (Figure 13) we can quickly re-derive the noise figure equation. Using this model we now need to define a few terms as Friis did in his original paper.

For maximum power transfer from Vs to the input terminal of the network we need a matched impedance; the power delivered from the source to the input terminals is then V_s²/4R. The power of the signal to delivered to the input under a matched condition is defined as the available signal power which we will call S_g. For a receiver, the available signal power for a sufficient SNR at the output of the receiver is what we defined as sensitivity above. Likewise, the available signal power at the output terminals of the network will be defined as S. Therefore, the gain G of the four terminal device is S/Sg. The available thermal noise power from the source resistance to the input terminals is defined as,

(EQ 4)

Note that the available noise power at the output of the source is due to thermal noise source to the left of input terminals and not the noise generated by the input devices of the terminal. A useful number to remember at the input of receivers is the available noise power from the source (antenna) in dBm or dBV which is easily calculated by remembering two numbers -174.8 and -186.8 respectively. Knowing the bandwidth of interest you can quickly calculate the available noise power at the receiver input in dBm using,

(EQ 5)

or in dBV we have,

(EQ 6)

where B is the signal bandwidth.

We next define N to be the available noise power at the output of the 4 terminal device. The noise factor is simply defined as the available signal-to-noise ratio at the signal source terminals to the available signal-to-noise ratio at the output of the network. A summary of the definitions are given below.

The noise factor for the 4 terminal network can then be expressed as,

(EQ 7)

which is straight from Friis paper. Using the fact that G=S/S_g we can express equation7 as,

(EQ 8)

from equation4 we can see that the available noise power at the output is simply, N=FGkTB which includes the noise from the signal source. The available noise at the output due to the network only is then,

(EQ 9)

Applying this same procedure of using available signal and noise powers the same argument can be used for cascaded networks. For example, if we have as Friis presents in his paper, network a, cascaded with network b as shown in figure 14.

The available noise power at the output terminals of network 2 is

(EQ 10)

substituting in the gain for the network a and network b we can express equation10 as,

(EQ 11)

the available noise power at the output of network a can be expressed as,

(EQ 12)

simply multiplying by the gain in network b gives the available noise power at the output of network b due to noise sources in network a or

(EQ 13)

from equation9 we can see that the available noise power due to noise sources in network b only is,

(EQ 14)

The total available noise power at the output can now be expressed as the sum of the noise source due to networks a and b reflected to the output,

(EQ 15)

Using equation13, equation14, and equation15 we can solve for the overall noise figure of network a and b with the following result,

(EQ 16)

Equation16 can be generalized even further as the following expression for n networks in cascade [3],

(EQ 17)

For passive filters, we often speak of the insertion loss rather than the power gain. In this case, the available noise power outputted by the source in figure 13 is reduced by the amount of insertion loss. For example, a network where the terminals are a short would correspond to 0dB insertion loss. The noise figure is then equal to the insertion loss.

4.1.3 Integrated Receiver Noise Figure Calculation

Receiver noise figure calculations and specifications for different blocks are easily performed when we have a knowledge of the impedances as we move down the receiver chain. Further, because we are not matching the impedance at the output of most integrated receiver blocks it is difficult to assign a noise figure specification to an individual block without a precise knowledge of the impedance. Therefore, the following procedure was used to determine the noise specification of the individual blocks and the overall receiver.

The receiver noise figure was performed for the entire receiver by breaking the calculation into two parts. First analyzing the integrated section of the receiver using equivalent noise voltages, then using the more conventional approach for the discrete components at the frontend of the receiver. The procedure used was the following.

1) On the front-end of the receiver, the insertion loss of individual discrete components were used to find the available signal power at the input of the chip. Because the input impedance of the LNA is matched to 50, the available noise power at the LNA input can be computed in both dBm and dBV. This available noise power at the LNA input is converted to a noise voltage across a the input impedance of the LNA.

2) For the integrated receiver blocks (everything after the LNA), all the noise computations were made with respect to equivalent input noise voltages and resistances, where the equivalent noise resistance is defined as the noise resistance corresponding to rms noise voltage power spectral density it produces,

(EQ 18)

In summary then, the noise figure of the receiver is calculated in two steps using the input of the chip as a boundary where the noise level, signal level, and the SNR are converted from available signal powers to rms noise voltages from which we get Req and the signal voltages as shown in the example receiver, figure 15. The overall noise contribution of the integrated section of the receiver is calculated by reflecting the equivalent noise sources along the receiver chain back to the LNA input then comparing this value with the available noise power at the input of the LNA due to the discrete components in a 50 environment. The available noise power due to a 50 output impedance from the board components is kTR50, or the equivalent noise resistance is simply,

(EQ 19)

The equivalent noise resistance of each integrated receiver block reflected to the LNA input is assuming the example Wideband IF architecture in figure 15,

(EQ 20)

The noise factor of the integrated section of the receiver is then,

(EQ 21)

where A_v is the voltage gain of the respective receiver components. With the noise factor for the integrated section of the receiver we can now use the conventional more conventional definition to calculate the receiver noise figure with respect to the power of the discrete components at the receiver frontend. Again, referring to the example shown figure 15, and using the results from equation21, the overall receiver noise factor including the discrete components is,

(EQ 22)

Where G is the power gain or in this case the insertion loss of the frontend components.

Remembering that the receiver sensitivity was defined as the required minimum available signal-to-noise ratio at the input of the receiver to get a sufficient SNR at the receiver output, we can now estimate a receiver's sensitivity based on the overall noise figure and the noise floor at the frontend.

(EQ 23)

Where CNR_output is the required carrier-to-noise ratio at the receiver output to meet the minimum BER requirements of a standard and NFloor is the noise floor defined by equation5.

FIGURE 15. Model showing the boundary for the two step noise calculation.

4.2 Intermodulation

There are several methods for calculating the intermodulation performance of an individual receiver block and of a cascaded chain of receiver components. Two methods for calculating the integrated receiver distortion performance are highlight in this section.

4.2.1 3^rd Order Intermodulation

A few useful relationships can be obtained by examining the plots for an individual component's intercept point. Take the simple example of a receiver component with an output 3^rd intermodulation intercept point as shown in figure 16.

The plot in figure 16 takes a little examination to understand its meaning. The plot is the output response both the linear and the 3^rd order component as a function of the magnitude of the output signals which are intermodulating at the output of the amplifier (a two tone test). Therefore, given the output 3rd order intercept point we can read both the linear component of the intermodulating signals and the 3rd order component produced by the two intermodulating signals as a function of the output intermodulating signal power. A very useful expression that can determine the magnitude of the 3rd order response at the output or input of a receiver block as a function of the output or input IP3 respectively is[4],

(EQ 24)

where V_o3rd is the output 3rd order component generated by two adjacent channel interfering signals of magnitude V_inter(o). Likewise, at the input of the same amplifier we could write,

(EQ 25)

where V_ip3i, V_inter(i), and V_i3rd are all variables in equation24 related to input of the simple block shown in figure 16 signals and intercept points at the amplifier input. Equation24 and Equation25 can be extend to a more generalized expression to describe the distortion component generated by any order intermodulation at given node in the receiver chain,

(EQ 26)

4.2.2 Intermodulation for cascaded blocks

There are several approaches to calculating both an intermodulation interferer at any stage in the receiver and the equivalent Intermodulation Intercept Point (IIP). We will use the example of the 3^rd order IM, although, this analysis could easily be extended to any order of intermodulation.

The first and simplest approach is to reflect each of the individual intercept points to either the input or the output of the cascaded blocks and find the minimum term and approximate this as the intermodulation intercept point for the cascaded chain[3].

(EQ 27)

Equation27 works well when there is a "weak link" in the chain and one input or output intercept point defines the cascaded IP3. However, when the individual IP3s contribute somewhat equally to the overall chains linearity performance then equation27 is not a good approximation.

The second approach takes into account the interaction of the intercept points between the cascaded blocks in the chain. In this approach, the assumption is that the distortion contribution from each of the blocks is uncorrelated, thus their distortion products are independent from block to block. If we write the total 3rd order distortion products at the output of the cascade shown in figure 5 we get [4],

(EQ 28)

where V_out^3rd is the total 3rd order distortion of the cascaded configuration and V_o1^3rd, V_o2^3rd, V_o3^3rd are the output distortion contributions of each of the blocks. We can now reflect the output distortion to find the equivalent input IP3 of the three cascaded blocks,

(EQ 29)

expressing each of the 3^rd order distortion components using equation24 we have,

(EQ 30)

As noted previously, the distortion between the blocks is uncorrelated, however, within a individual block the distortion is correlated and we can easily reflect the output IP3 for a block back to its input, or V_IP3in=V_IP3on/A_vn for the n^th stage. Also, we can now express all of the output voltages in terms of V_in and the voltage gain A_v of a block. Equation30 now becomes,

(EQ 31)

Cancelling terms we get the familiar form of,

(EQ 32)

the total input referred IP3 for the cascaded blocks is,

(EQ 33)

A similar analysis reveals that for a two stage cascaded network the equivalent output IP3 can be expressed as,

(EQ 34)

and the equivalent input IP3 of the same two stage network is,

(EQ 35)

Both can be used recursively to obtain the equivalent IP3 at any node in a multi-cascaded chain. Both equation34 and equation35 were used to find the carrier-to-distortion ratios at different points in the receiver chain.

4.3 Blocking and LO Phase Noise

Signals present in bands other than the desired channel to recover will create spurious signals which fall within the signal band, resulting in a degradation of the C/I (carrier-to-interference ratio) at the receiver output. Selectivity is a measure of a receivers immunity or ability to handle signals outside of the desired band. Intermodulation of two or more adjacent channel signals creating a spurious signal or interferer within the desired signal band is an example of one mechanism which degrades a receivers selectivity. The blocking performance of a receiver is another measure of the overall selectivity.

4.3.1 Mechanism of reciprocal mixing with the blocker

A Local Oscillator (LO) is used with a mixer in the receiver signal path to frequency translate the desired signal spectrum about the carrier to a lower frequency. Phase noise is a measure of the spectral purity of the local oscillators used in this operation. Figure 18 illustrates how undesired sideband energy from the local oscillator (phase noise) "reciprocal mixes" with adjacent channels or out-of-band signals creating an inteferer within the desired channel.

4.3.2 Calculation of blocking interference

One method to perform the phase noise calculation is to assume that the receiver channel is noiseless and the only interference within the signal band is due to the phase noise mixing with out-of-signal band blockers [5]. Typically, the RF standards specify the magnitude of the blocker (see section for standards under consideration) and desired signal along with a required BER which translates to a needed C/I ratio at the output of the receiver. Figure 19 illustrates that the required phase noise performance at each frequency can be estimated as,

(EQ 36)

where PN(f_c) is the phase noise in dBc/Hz f_c away from the carrier, S_bl is the magnitude of the blocker in dBm or dBV while S_desired is the magnitude of the desired carrier in dBm or dBV. C/I_min is the minimum required carrier-to-interference ratio and BW is bandwidth of the desired signal.

As stated before, equation36 can be used to approximate the required phase noise performance of the local oscillators in the receiver assuming there are no other sources of interference. However, practically speaking this isn't true and the receiver noise contribution will further degrade the overall carrier-to-interference ratio at the output. Therefore, a better picture of the true C/I ratio at the output of the receiver should include the white noise added to the desired signal band.

The procedure to determine the receiver phase noise performance for this project is as follows. All of the equivalent input noise resistances are referred to the output of the receiver including the noise contribution at the input of the receiver (12.5). Then at each mixer output, the power of the blocker signal reciprocal mixing with the LO phase noise creating an interferer within the desired signal band can be found with the following expression,

(EQ 37)

where ^{^2}_Mixerout is the power of interferer created inband. This interference source can then be referred to the output of the receiver along with all of the interferers in the receiver chain including the noise contribution of the individual receiver components. This procedure is illustrated for the Wideband IF architecture in figure 20.

Treating the interference introduced by the blocker reciprocal mixing with the phase noise of the LOs as a rms noise voltage sources we can reflect all of the interference sources both thermal and phase noise to the output or the receiver. The total interference can be expressed in terms of the equivalent input noise resistances (Req) of each block, the individual block voltage gain and the blocking interference created by the phase noise and blocker of each mixer. Defining ²_out as the total inband voltage interference power at the output of the receiver we have,

(EQ 38)

where ²_thermal represents all of the thermal noise contributions referred to the output of the receiver. The receiver output C/(I+N) can be expressed as,

(EQ 39)

where Av is the overall receiver voltage gain and S_Desired is the rms voltage power of the desired signal. Next, if we make the simplifying assumption that the power of the blocker reciprocal mixing with the phase noise of the individual mixers contribute equally (both mixers have the same phase noise profile) and the thermal noise contribution of each block has been determined we can find the maximum interference allowed by the phase noise and blocker mixing,

(EQ 40)

Using equation40 used in conjunction with equation37 we can determined the required phase noise performance of the local oscillators to meet the blocking profile given by a particular standard.

5.0 Receiver Component Specifications

Each block in the receiver is specified with requirements for maximum equivalent input thermal noise contribution (R_eq), the equivalent input 3^rd order intercept voltage, the voltage gain A_v, and the maximum differential output zero-to-peak voltage. The equations given in section4.0 were tabulated using microsoft excel. A complete receiver design was done for both the Wideband IF architecture and the Low-IF with single conversion system.

By far the most difficult set of specifications to meet were those of the GSM standard. In particular, there exist a trade-off between the receiver noise figure and the blocking performance. The 3MHz blocker (-23dBm at the input) puts a limit on the amount of gain that can be used in the RF front-end making it more difficult to meet the noise figure requirement. The intermodulation performance should be attainable for all standards. Several interactions were made in excel to obtain an initial set of specifications on the individual blocks.

A summary of the individual receiver component specifications are given in section5.1 through section5.4. Illustrations of the overall receiver performance based on the individual block specifications are given in section6.0 for both the wideband IF architecture and Low-IF with single conversion.

5.1 Low Noise Amplifier

The low noise amplifier can have either a differential or single ended input. The input must be matched to a 50 impedance. The LNA requirements are summarized in table2.

TABLE 2.

Arch.	Req	VIP3i	Vo-pmax(Output)	Av	P-1db	DR	Power
WIF	11 <	200 mV >	190 mV	22 dB		120 dB	min.
Low-IF	11 <	200 mV >	188 mV	22 dB		120 dB	min.

5.2 RF-to-IF Mixers (LO1)

All mixers should be doubly balanced. The mixer requirements are summarized in table3. Note the gain is assumed to be the voltage conversion gain.

The highest input frequency for the RF-to-IF mixers will be 1.9 GZ. The output frequency at IF output will range from 200 MHz to 250 MHz

5.3 IF-to-Baseband Mixers (LO2)

Similar to the RF mixers, the IF mixers should be doubly balanced. The IF mixer requirements are in table4. The mixer is specified for WIF only for obvious reasons. The IF-to-Baseband mixers will be required to operate on an incoming frequency ranging from 200 MHz to 250 MHz. The output will be at baseband centered about DC.

5.4 Baseband Circuits

The equivalent input noise and input voltage IP3 are referred to the input of the anti-alias filter. It was assumed that the single pole at the second mixer output will guarantee 15dB attention of the 3MHz blocker which sets the maximum required voltage swing along the receiver path.

TABLE 5.

Arch.	Req	VIP3i	Vo-pmax (Output)	Av	P-1db	DR (Input)	Power
WIF	130,000 <	6 V >	670 mV	6 dB		90 dB
Low-IF	130,000	6 V	535 mV	6 dB		88 dB

A variable bandwidth will be required to allow for multi-standard operation. For GSM the receiver will frequency translate the carrier to a low IF, however, for both DECT and GPS the carrier will be translated to baseband. The receiver can be thought of as low-IF for GSM and as a direct-conversion receiver for DECT and GPS, this is illustrated in figure 21

FIGURE 21. Bandwidth channel filtering requirements for tri-standard operation.

The bandwidth and dynamic requirements of the baseband are summarized in table6

5.5 Frequency Synthesizers

The relatively narrow channel bandwidth coupled with the large 3MHz blocker of GSM define the required synthesizer performance for a tri-standard receiver. Using the approach that was described in section4.3 it was determined that the phase noise performance required of both LO1 and LO2 are as shown in table7. These phase noise requirements should be suitable for both the WIF and the Low-IF receiver architectures.

Both synthesizers must drive the mixer with greater than a 700mV zero-to-peak signal differentially. The required common-mode voltage for the mixer input has yet to be determined.

6.0 Predicted Receiver Performance Wideband-IF vs. Low-IF

Shown below in table8 is a summary of the predicted receiver performance based on the LNA, Mixer, and Baseband specifications given in section5.1 through section5.5

Table9 and table10 outline some of the key results obtained from the excel worksheet used for both receiver architectures. The CNR, C/I, and C/(I+N) ratios throughout the receiver are tabulated for the sensitivity, intermodulation and blocking test in GSM. Note the Carrier-to-distortion ratios are shown at the output of each receiver block and number given in the baseband column is the carrier-to-interference ratio at the output of the receiver.

Both receiver architectures were designed to have an approximate noise figure of 9 dB with a reasonable intermodulation performance. The required dynamic range in table8 is set by both the maximum signal into the baseband minus the required noise floor at the baseband input.

table9

With respect to noise and the required noise figure there exist a trade-off between Wideband IF and Low-IF w/ single conversion architectures. Practically speaking the voltage gain of the LNA is limited for stability reasons to about 22 dB while the noise performance of the baseband filter and ADC have a practical lower bound of 20uV. Therefore, to meet a target noise figure for either receiver architectures considerable voltage conversion gain must be obtained in the mixer stage to reduce the noise contribution from the baseband. A constraint on the voltage gain through the mixer section of the receiver is the 3MHz blocker in GSM, excess mixer gain will create prohibitively large signals at baseband. For the initial receiver design we can see the maximum signals as we propagate down the receiver chain in figure 23, table9, and table10.

For the Wideband-IF receiver, the voltage gain is 10 dB for both the first and second mixer stages. However, in the Low-IF receiver considerable gain must be achieved in the first mixer to keep the noise contribution from the baseband at a reasonable value. For the purposes of the initial design for the Low-IF architecture, 18 dB of voltage conversion gain was used to hold the noise figure of the receiver below 9.5 dB, making both the mixer design and the Low-IF receiver somewhat impractical.

Note that in the case of Low-IF with single conversion the baseband contributes significantly more noise to the overall receiver than the WIF even though the first mixer gain has been increased from 10dB to 18dB.

The GSM intermodulation test was outlined in section4.2. This distortion test is performed by applying two -49 dBm adjacent channel signals with a -99 dBm desired carrier. Figure 25 shows the desired carrier level, distortion level and noise level for both the WIF receiver and the Low-IF with single conversion. Note that the C/(I+N) ratio of the Low-IF receiver is superior to the WIF architecture which intuitively follows from the fact that the Low-IF receiver has a better IP3. This can be better understood by examining the contribution of each stage to the overall receivers' linearity.

A breakdown of the interference components at the output of the receiver under the GSM intermodulation test condition is figure 26. Notice that the percentage contribution of distortion for the WIF architecture is higher than in the Low-IF with single conversion approach. Figure 26 shows good agreement with the predicted receiver input referred voltage IP3 given in table8. We can see that the distortion contribution is significantly less for the Low-IF approach because the IP3 is much higher than that predicted for WIF.

Figure 27 is a breakdown of each receivers' block contribution to overall input referred voltage IP3. The individual terms of equation32 are plotted in figure 27 as a percent contribution to 1/V²_rmsIP3. Obviously, the component that takes a larger portion of this pie dominants the overall receivers linearity. As expected the distortion performance of the second mixer limits the IP3 for the Wideband IF architecture. For the Low-IF, the limitation to the receivers linearity is the input swing to the baseband filter. An ideal receiver design would show an equal contribution for all the receiver components to the overall IP3 and in this particular implementation the IP3 number given in section5.0 for the LNA and Mixer (LO1) can probably be relaxed or traded-off for better overall power performance in either of the proposed architectures.

The phase noise performance of the overall receiver was estimated using the method described in section4.3. Again, under the worst case blocking condition, the 3 MHz blocker at -23dBm with a -99 dBm desired carrier, the output carrier-to-noise ratio was estimated. With the predicted noise performance of the receiver chain it was determined that a -145dBc/Hz phase noise performance must be obtained from each of the two (LO1 & LO2) frequency synthesizers to meet the 9dB CNR requirement at the output of the receiver. From table9 and table10 we can see that using a synthesizer with a phase noise profile of -145dBc/Hz at 3MHz from the carrier will produce a sufficient CNR at the output of the receiver while figure 28

7.0 References

[1] Sabin, W. and Schoenike, E. "Single-Sideband Systems & Circuits", McGraw-Hill Book Company, 1987, pp. 88-134.

[2] Friis, F. "Noise Figure of Radio Receivers," Proc. IRE, Vol. 32, pp.419-422, July 1944.

[3] Bahzad, A. "The implementation of a high speed experimental transceiver module with an emphasis on CDMA applications" Masters Thesis, ERL Memorandum No. UCB/ERL M95/40, June 1995.

[4] Rohde, U. and Bucher, T "Communications Receivers Principles & Design," McGraw-Hill Book Company, 1988

[5] Stezler, T. CICC `97 short course notes. Santa Clara, CA., May 7, 1997.

[6] Rudell, J. Ou, JJ. Cho, T. Chien, G. Brianti, F. Weldon, J. and Gray, P., "A 1.9GHz Wide-band IF Double Conversion Integrated Receiver for Cordless Telephone Applications", International Solid-State Circuits Conference, San Francisco CA, Feb. 1997.