The explosive growth in the wireless communications industry has fueled recent research efforts to increase both integration and adaptability/programmability in radio-frequency (RF) transceiver design.
A typical commercially-implemented cellular telephone today comprises multiple chips and discrete components which are fabricated in different technologies (GaAs, Bipolar and CMOS). One of the goals of this research is to integrate these components onto a single chip in standard CMOS technology, in line with its fine-line VLSI capabilities. This fully-integrated, single-chip solution results in personal communications devices with lower power consumption, lower cost, and smaller form factor.
The increasing variety of wireless applications--cellular phones, cordless phones, pagers, wireless LAN, and global positioning system (GPS)--coupled with the proliferation of communications standards within each wireless application--each with its own set of signal bandwidth, blocking profile, and dynamic range and intermodulation requirements--motivates the second goal of this research. Implementing two or more wireless standards in a transceiver design enhances the functionality and flexibility of the personal communications device. This offers users increased international roaming as a result of the wider availability of service and network providers.
Adaptability to multiple communications standards/services can be easily achieved in the digital domain with the use of a programmable digital filter. Because channel selection is now moved to the digital domain, and because a fully-integrated design calls for the elimination of discrete high-Q SAW filters at IF, the entire RF spectrum is now translated down to baseband. Baseband circuits need to process a potentially weak desired signal in the presence of strong adjacent-channel blockers. This results in increased dynamic range and linearity requirements for baseband components such as the continuous-time filter and A/D converter. In addition, baseband circuits need to adapt to different channel bandwidth, noise and distortion requirements of multiple standards.
A sigma-delta A/D converter is uniquely suited to this application for a number of reasons. Sigma-delta modulators can achieve a high dynamic range without relying on precise component matching. By modifying only its oversampling ratio, the same modulator structure can be employed to adapt to different bandwidth and dynamic range requirements. In addition, the wideband modulator shapes its quantization noise with a high-pass transfer function such that the quantization noise spectrum falls into the same band as the blockers. This implies that the same digital decimation filter following the A/D converter can be used to reject both the quantization noise and blockers.
A 4th-order, 2-2 MASH (cascade) sigma-delta modulator was designed in a 0.35um double-poly CMOS process. The design is capable of adapting to both cellular (GSM, DCS1800, PCS1900, E-GSM) and cordless (DECT) standards. The dynamic range is made programmable between 90dB (cellular) and 74dB (cordless), with signal bandwidths between 100kHz (cellular) and 700kHz (cordless) to accommodate the various standard-specific requirements. Total power consumption is 70mW. The design is presently being fabricated on the same die as the other transceiver blocks (LNA, down-conversion mixers, synthesizers, DAC, upconversion mixer, and PA's).