Noise Models for MOSFETs in Saturation

I. Introduction

This work begins with an examination of the traditional noise model and its shortcomings. Since the MOSFET channel material is resistive, it exhibits thermal noise. In analog circuits, most devices are operating in the saturation region, and according to long-channel theory, the drain current noise spectral density in saturation may be expressed as

(1) ,

where g_m is the transconductance [6]. Eq. 1 assumes that the device is operating at frequencies well above the flicker noise corner frequency so that flicker noise may be neglected. This model underestimates the actual noise present in short-channel devices by a factor ranging from three to ten times [3,4,5].

A more accurate noise model must account for high-field effects. While these effects are also known as short-channel effects, they are present in all devices and can degrade performance at high terminal voltages. As such, an accurate noise model for any device must account for these effects which can degrade performance in the following ways. First, at high electric fields, the carrier velocity saturates, resulting in a corresponding decrease in effective mobility [7]. Second, the effective channel length decreases as V_d is increased beyond V_dsat due to the velocity saturation region which has length L [7]. Although channel length modulation (CLM) is also present in long-channel devices, L may be a significant portion of the overall channel length in short-channel devices. Third, the threshold voltage decreases with decreasing channel length and with increasing drain bias due to drain-induced barrier lowering (DIBL) [8]. All of these effects influence the channel conductance, which is the source of the thermal noise.

Recent work has addressed these issues [9]; however, the result is incomplete since the noise model is derived using an equation which does not hold for short-channel devices. Furthermore, hot electrons exist when high electric fields in MOSFET devices cause electrons to have a carrier temperature (T_e) which varies with the electric field and exceeds the lattice temperature (T). This alone increases the amount of thermal noise in the device[12]. Moreover, these hot electrons may cause impact ionization resulting in electron-hole pair generation; the generated electrons are collected by the drain, and the holes give rise to substrate current. The substrate current exhibits shot noise since this current is due to carriers crossing a potential barrier at random. It has been found that the measured noise due to impact ionization is greater than this shot noise [10]. Models to account for this enhancement have been proposed [10,11]; in this work, a new model based on a different interpretation of this enhancement is presented.

This paper presents an improved model for MOSFETs in saturation. The next section presents a derivation of the improved model which includes mobility degradation, CLM, DIBL, electron temperature, and substrate current. Section III compares simulated results with measured values and Section IV concludes this paper with some closing comments.

II. Analysis

In this section, models for the noise of MOSFETs in saturation are derived. The first of these is derived without accounting for the deviation of electron temperature from the lattice temperature. The second model includes the effect of electron temperature on the noise. Finally, a preliminary model to account for the increase in noise at high drain voltages is discussed.

A. Noise Model without Electron Temperature

The thermal noise spectral density of a MOSFET device in any region of operation is given by

(2) ,

where g(V) is the channel conductance at a given point along the channel and V is the corresponding voltage [12]. The most basic equation from which g(V) can be derived is

(3) .

Including the effects of mobility degradation, the channel current is given by

(4) .

Eq.4 can be put in the form of Eq.3 in the following fashion:

(5) .

The equation from which [9] starts neglects the second term in the above equation, and thus the result in that paper is incomplete. From Eq.5, the noise spectral density is

(6) .

In order to account for the short-channel effects, the channel length used in Eq.6 must be the L_eff of the device, allowing for CLM. Also, the threshold voltage used in the above equation must be the "effective" V_t of the device, taking into account DIBL. These two effects do not need to be included at an earlier point in the analysis, since the integration done to determine the noise spectral density assumes a fixed drain voltage, and the amount of both DIBL and CLM is fixed for a given drain voltage. It should also be noted that Eq.6 predicts more noise than that obtained by simply modifying g_m in Eq.1 to include high-field effects.

In the limit that E_satL_eff is much larger than (V_g-V_teff) (equivalent to assuming that the device is a long channel device), the above equation reduces to the standard long-channel noise model. However, in the limit that (V_g-V_teff) is much larger than E_satL_eff, Eq.6 simplifies to

(7) .

Eq.7 predicts less noise than the long-channel model predicts, which indicates that there may be another factor that causes the noise to be enhanced. Hot electron effects may help account for the observed noise enhancement.

B. Noise Model with Electron Temperature

Under high channel electric fields, the temperature of electrons in the channel can rise above that of the lattice. This effect can increase the thermal noise of the device [12]. Eq.2 can be modified to include the effect of electron temperature, and the result is

(8) ,

where T_e is the electron temperature and T is the lattice temperature.

One of the more challenging aspects of including the effect of electron temperature in the noise model is finding a good model for the electron temperature. A prevalent model in the literature expresses the electron mobility as a function of the temperature as shown below [13, 14,15]:

(9) .

Mobility can also be represented as a function of electric field [7]:

(10) .

Eq.10 presents a slightly more complex and more accurate relationship than the piecewise function normally used. Equating the two and solving for T_e/T gives

(11) .

Using this equation for T_e/T, the noise spectral density is found to be

(12) .

Again, in the limit that E_satL_eff is much larger than (V_g-V_teff), the noise simplifies to the long-channel model. However, in the case of E_satL_eff being much less than (V_g-V_teff), Eq.12 shows that the noise is three times larger than the standard long-channel model given in Eq.1. Moreover, it should be noted that the actual g_m of the device (including high-field effects) is significantly less than in the long-channel case, and thus the noise would appear to be magnified even more than three times.

Still, as the drain voltage rises to large values, the noise observed increases above what Eq.12 predicts. One effect not included in Eq.12 which becomes important at high drain voltages is substrate current, which introduces shot noise into the drain current. This effect is examined in the next section.

C. Shot Noise due to Substrate Current

Finally, at high drain voltages, significant noise increases have been reported [10,11], and it is clear that there is noise associated with the substrate current that is generated by the high drain voltage, specifically shot noise. Shot noise is generated by the random process associated with a mobile carrier jumping a potential barrier, e.g., the potential barrier of a p-n junction. The shot noise associated with this substrate current is represented as

(13) .

Unfortunately, this alone does not explain the increase in noise seen in the device [10,11]. A common explanation in the literature is to include some "avalanche" multiplication factor M in the S_Isub equation, and fit M to experimental data.

However, a more intuitive interpretation can be reached if the increase in drain current that accompanies the presence of I_sub is understood. As I_sub increases, the potential of the substrate starts to increase due to the resistive drop in the substrate (V_sub=I_sub R_sub, where R_sub is the effective substrate resistance seen by I_sub). This tends to forward bias the bulk-source junction, and thus reduce the threshold voltage, which accounts for a larger drain current than expected. Similarly, the change in V_sub will be a noisy process due to the noise associated with I_sub. The noise in V_sub may cause a noise process in the threshold voltage, which could add to the noise seen in the drain current.

Determining an equation for this extra noise is relatively straightforward. Assuming the shot noise spectral density from I_sub given by Eq.13, the noise spectral density in V_sub is given by

(14) .

This noise spectral density can be expressed as a noise spectral density in V_t (at least in a small signal sense) by multiplying by the ratio of V_t to V_sub, or

(15) .

Finally, this can be related to a noise spectral density in I_d through the ratio of I_d to V_t, which is equivalent in magnitude to g_m, and thus the final equation is

(16) .

Eq.16 can effectively be seen as an amplified version of the noise spectral density in I_sub. It should be noted that this noise enhancement factor is not constant, but rather a function of the bias conditions.

The total noise spectral density in I_d is given by the sum of Eq.16 and Eq.12,

(17) .

III. Results

In this section, the model derived in this work is compared with measured data. Since devices from which noise data can be measured were not available at the time of this writing, this model is compared with data observed by others and presented in literature. The noise data used in this section are taken from [9, 10, 16].

Noise data from an NMOS device with characteristics as shown in Table1 is plotted in Figure 1, along with the noise

Table 1. NMOS Device Parameters [9]

Parameter	Value
W	25 m
L	3 m
tox	42.5 nm
Na	2 x1015
Vt0	0.75 V
Vgs	5.5 V
Vdsat	3.29 V

Eq.12

Data for two devices was also taken from [10], whose characteristics are shown in Table 2. Figure 5 shows a comparison between the measured values of the noise enhancement factor (not to be confused with the body effect coefficient) and those predicted by the model presented in this work for Device A. is defined to be a multiplicative factor used to account for noise enhancement over the standard long-channel model, and is actually referenced to the zero-drain bias drain conductance g_d0, which

Table 2. NMOS Device Parameters [10]

Parameter	Device A	Device B
W	1200 m	800 m
L	1.25 m	.75 m
tox	25 nm	25 nm
Vt0	0.53 V	0.52 V
Vgs	1.2 V	1.1 V
Vdsat	0.57 V	0.47 V

Finally, the noise model was used to generate an equivalent noise figure for a 1.9 GHz low noise amplifier (LNA) designed in a 0.6 m CMOS process [16]. The results are shown in Table 3. Spice severely underestimates the noise figure of the LNA. While the noise figure predicted by the model in this paper still underestimates the noise of the LNA, the author stated that there were other sources of noise outside of the amplifier that added to the noise figure, such as board parasitics as well as noisy bias components. The author further stated that the prediction of the model presented here is similar to the noise figures presented in similar CMOS LNA's.[4]

IV. Conclusion

A complete model for the drain current noise for MOSFET devices in the saturation region has been presented. This model accounts for mobility degradation, DIBL, CLM, as well as electron temperature. Also, an intuitive model for the noise induced by the substrate current Isub at high drain voltages was presented. These models were shown to match well with observed noise data presented in earlier papers.

From these models, a few key guidelines can be extracted. The models in this paper, as well as the observed data, indicate a severe increase in the noise at high electric fields, making it imperative that as device geometries are reduced, terminal voltages must be reduced as well, to minimize the electric fields existing in the channel. Also, in order to achieve a minimum amount of noise, the device should be biased at low (V_g-V_t) in order to keep the device acting as a long-channel device. However, the (V_g-V_t) should be small enough to avoid the peak in the I_sub-V_g curve.

V. References

1] A. Karanicolas, "A 2.7V 900MHz CMOS LNA and Mixer," ISSCC Digest of Technical Papers, February 1996.

[2] A. Shahani, D. Shaeffer, and T. Lee, "A 12mW Wide Dynamic Range CMOS Front-End for a Portable GPS Receiver," ISSCC Digest of Technical Papers, February 1997.

[3] A. Abidi, "High-Frequency Noise Measurements on FET's with Small Dimensions," IEEE Transactions on Electron Devices, vol. ED-33, no. 11, pp. 1801-1805, November 1986.

[4] D. Shaeffer and T. Lee, "A 1.5V, 1.5GHz CMOS Low Noise Amplifier," 1996 Symposium on VLSI Circuits, p. 32-3, June 1996.

[5] R. Jindal, "High-Frequency Noise in Fine Line NMOS Field Effect Transistors," International Electron Devices Meeting, pp. 68-71, December 1985.

[6] P. Gray and R. Meyer, Analysis and Design of Analog Integrated Circuits, 3rd Edition, John Wiley & Sons, Inc., New York, 1993.

[7] S. Wolf, Silicon Processing for the VLSI Era, Volume 3: The Submicron MOSFET, Lattice Press, California, 1995.

[8] Z. Liu, C. Hu, J. Huang, T. Chan, M. Jeng, P. Ko, and Y. Cheng, "Threshold Voltage Model for Deep-Submicrometer MOSFET's," IEEE Transactions on Electron Devices, vol. 40, no.1, pp.86-93, January 1993.

[9] B. Wang, J. Hellums, and C. Sodini, "MOSFET Thermal Noise Modeling for Analog Integrated Circuits," IEEE Journal of Solid-State Circuits, vol. 29, no. 7, pp. 833-5, July 1994.

[10] R. Jindal, "Noise Associated with Substrate Current in Fine-Line NMOS Field-Effect Transistors," IEEE Transactions on Electron Devices, vol. ED-32, no. 6, pp. 1047-52, June 1985.

[11] B. Wang, "Wide Band Noise in MOSFETs," M.S. Thesis, Massachusetts Institute of Technology, October 1992.

[12] A. Van der Ziel, Noise in Solid State Devices and Circuits, John Wiley & Sons, Inc., New York, 1986.

[13] K. Seeger, Semiconductor Physics, Springer-Verlag, New York, 1973.

[14] R. A. Smith, Semiconductors, Cambridge University Press, New York, 1978.

[15] G. W. Taylor, "Velocity-Saturated Characteristics of Short-Channel MOSFETs", AT&T Bell Laboratories Technical Journal, Vol. 63, No. 7, September 1984.

[16] J. Rudell, et. al., "A 1.9 GHz Wide-Band IF Double Conversion CMOS Integrated Receiver for Cordless Telephone Applications," ISSCC Dig. Technical Papers, Feb. 1997.