Todd Weigandt's Home Page

I'm a recent PhD graduate from Prof. Paul Gray's group at the University of California at Berkeley, and am now working with Analog Devices . My research at Berkeley has been the development of low-phase-noise, low-timing-jitter design techniques for delay cell based VCOs and frequency synthesizers. While at Berkeley I had the pleasure of working with a number of other talented students in this area. There web pages are listed below: First Generation:
  • Srenik Mehta High-speed Divider, Phase-interpolator Design
  • Steve Lo: Phase Detector and Charge-Pump PLL Design
    • Latest Generation:
  • George Chien DLL Based Frequency Synthesizer Design
  • Li Lin Frequency Synthesizer Design with integrated LC-tank VCOs

    • Thesis

  • Todd Weigandt, "Low-Phase-Noise, Low-Timing-Jitter Design Techniques for Delay Cell Based VCOs and Frequency Synthesizers", January 1998. (PDF Format)
    • Thesis available in Acrobat PDF format!!!

    Papers

  • T. Weigandt, B. Kim, P.R. Gray, "Analysis of Timing Jitter in CMOS Ring Oscillators", Intl. Symposium on Circuits and Systems (ISCAS), June, 1994..
  • B. Kim, T. Weigandt, P.R. Gray, "PLL / DLL System Noise Analysis for Low Jitter Clock Synthesizer Design", Intl. Symposium on Circuits and Systems (ISCAS), June, 1994..

    • Slides

    T. Weigandt, "Integrated VCO/Synthesizer Design for a Monolithic CMOS RF Receiver," Qualifying Exam, Oct. 1995.
  • T. Weigandt, S. Mehta, "Integrated VCO/Synthesizer for DECT/Multi-Standard RF Modems", ILP Conference, Berkeley CA : March, 1995.
  • T. Weigandt, S. Mehta, "Frequency Synthesis for a Monolithic CMOS RF Transceiver", InfoPad Retreat, Jan., 1995.
    • Back to the PRG Group page. 
    Todd C. Weigandt
University of California
207-26 Cory Hall #1772
Berkeley, CA 94720-1772

Email:  weigandt@eecs.berkeley.edu
Office: (510) 642-9399
FAX:    (510) 642-2739

finger @hookipa.eecs
    Last modified: Mon Sep 25 12:57:36 1995